1. Field of the Invention
The present invention relates to a one-chip microcomputer with an analog-to-digital converter in which a large number of analog signals generated one after another in an external switching circuit are received at a small number of terminals and are recognized.
2. Description of Related Art
In cases where a large number of analog signals are input one after another to a plurality of input terminals of a one-chip microcomputer, a key matrix type circuit or an analog-to-digital (A/D) converter is used as an input circuit of the one-chip microcomputer. In case of the key matrix type input circuit, in cases where the number of input terminals of the one-chip microcomputer is equal to or higher than two and is the same as the number of output terminals of the one-chip microcomputer, a large number of analog signals input one after another to the one-chip microcomputer can be most efficiently recognized.
FIG. 9 is a circuit view showing a conventional one-chip microcomputer with a key matrix type input circuit. In FIG. 9, 1 indicates a conventional one-chip microcomputer. P00 to P03 indicate a plurality of input terminals of the conventional one-chip microcomputer 1. P20 to P23 indicate a plurality of output terminals of the conventional one-chip microcomputer 1. 2a to 2d indicate a plurality of input signal lines connected to the input terminals P00 to P03. 3a to 3d indicate a plurality of output signal lines connected to the output terminals P20 to P23. 4a to 4p indicate a plurality of switches respectively connecting one input signal line and one output signal line. An off-state of each switch is set to an on-state when a user pushes down a key.
FIG. 10 is a timing chart showing an operation performed in the conventional one-chip microcomputer 1 with the key matrix type input circuit.
Next, an operation of the conventional one-chip microcomputer 1 with the key matrix type input circuit will be described with reference to FIG. 10.
As shown in FIG. 10, each of the input terminals P00 to P03 and the output terminals P20 to P23 is pulled up to a high (“H”) level in advance by the conventional one-chip microcomputer 1, and all the switches are initially set to an off-state. Thereafter, a low (“L”) level signal is cyclically output from the conventional one-chip microcomputer 1 to each of the output terminals P20 to P23 in time sharing. In cases where a specific switch is set to an on-state to input an analog signal to the conventional one-chip microcomputer 1 through the specific switch, when the L level signal is output to a specific output terminal connected to the specific switch through a specific output signal line, the H level of a specific input terminal connected to the specific switch through a specific input signal line is lowered to the L level. Therefore, it is judged in the conventional one-chip microcomputer 1 that the specific switch connecting the specific input terminal and the specific output terminal is set in the on-state.
In the example shown in FIG. 10, the switch 4b is set in the on-state during an on-time period of the switch 4b to input an analog signal to the conventional one-chip microcomputer 1 through the switch 4b. When the L level signal is output to the output terminal P21 within the on-time period of the switch 4b, because the output signal line 3b connected to the output terminal P21 is connected to the input signal line 2a connected to the input terminal P00 through the switch 4b set in the on-state, the H level of the input terminal P00 is lowered to the L level. Therefore, it is judged in the conventional one-chip microcomputer 1 that the switch 4b is set in the on-state.
Accordingly, because the output of the L level signal to each of the output terminals P20 to P23 is cyclically performed under control of the conventional one-chip microcomputer 1, the input of an analog signal through a switch set in the on-state can be recognized in the conventional one-chip microcomputer 1 according to the combination of the output terminal, from which the L level signal is output, and the input terminal in which the L level signal is received in simultaneous with the output of the L level signal. Therefore, because a plurality of switches are arranged in the key matrix type input circuit connected to the input and output terminals of the conventional one-chip microcomputer 1, a large number of analog signals input to the conventional one-chip microcomputer 1 can be recognized by arranging a small number of input and output terminals.
In the conventional one-chip microcomputer 1 with the key matrix type input circuit shown in FIG. 9, the number of input terminals is four, and the number of output terminals is four. Therefore, each of sixteen analog signals input through sixteen switches respectively can be recognized in the conventional one-chip microcomputer 1.
However, in the conventional one-chip microcomputer 1 with the key matrix type input circuit, to operate the conventional one-chip microcomputer 1 by using sixteen keys corresponding to sixteen switches, it is required to arrange eight terminals (four input terminals and four output terminals) in the conventional one-chip microcomputer 1. Therefore, in cases where the number of terminals attached to the conventional one-chip microcomputer is small, there is a case where the number of switches possible to be arranged in the key matrix type input circuit is lower than that required for the conventional one-chip microcomputer. As a result, it is inconvenient to use the key matrix type input circuit for the conventional one-chip microcomputer.
Next, an example of the inputting of a plurality of analog signals through an A/D converter arranged in a conventional one-chip microcomputer is described.
FIG. 11 is a circuit view showing a conventional one-chip microcomputer with an A/D converter connected to an external switching circuit. In FIG. 11, 5 indicates each of a plurality of resistors which are arranged in an external switching circuit connected to the conventional one-chip microcomputer 1. The resistors 5 have the same resistance. 6a to 6d indicate switches arranged in the external switching circuit. One end of each switch is connected to a low level terminal set to Vss. Each of the switches 6a to 6d is set in an off-state when no user's switching operation is performed for the switch. In the conventional one-chip microcomputer 1, 7 indicates an analog input terminal, 8 indicates an A/D converter, 9 indicates a signal line of an A/D conversion start request signal ADSTART, 10 indicates a data bus, and 11 indicates a signal line of an A/D conversion finish signal ADF. The analog input terminal is set to the H level (Vcc) when no switch is set to the off-state.
Next, an operation of the conventional one-chip microcomputer 1 having the A/D converter 8 will be described below.
Four resistors 5 are arranged between the switch 6a and the analog input terminal 7. Therefore, when the switch 6a is set to an on-state, a level of the analog input terminal 7 is set to a first level lower than the H level Vcc. Two resistors 5 are arranged between the switch 6b and the analog input terminal 7. Therefore, when the switch 6b is set to an on-state, a level of the analog input terminal 7 is set to a second level lower than the first level. One resistor 5 is arranged between the switch 6c and the analog input terminal 7. Therefore, when the switch 6c is set to an on-state, a level of the analog input terminal 7 is set to a third level lower than the second level. No resistor is arranged between the switch 6d and the analog input terminal 7. Therefore, when the switch 6d is set to an on-state, a level of the analog input terminal 7 is set to a fourth level (or a Vss level) lower than the third level. That is to say, a level of an analog input signal received at the analog input terminal 7 is changed in dependence on the selection of the switches 6a to 6d. The level of the analog input signal received at the analog input terminal 7 is converted into a digital value DV in the A/D converter 8, and the switch set in the on-state is recognized in the conventional one-chip microcomputer 1 according to the digital value DV.
In this case, an A/D conversion start request signal ADSTART is periodically transmitted from a central processing unit (CPU) of the conventional one-chip microcomputer 1 to the A/D converter 8 through the signal line 9 to set the A/D converter 8 to an operation state. When an analog input signal is received at the analog input terminal 7, the analog input signal is converted into a digital value in the A/D converter 8 in synchronization with one A/D conversion start request signal ADSTART. Thereafter, when the digital value is obtained, an A/D conversion finish signal ADF is output from the A/D converter 8 to the CPU through the signal line 11, and the digital value DV obtained in the A/D converter 8 is read out to the CPU through the data bus 10.
In the conventional one-chip microcomputer 1 with the A/D converter 8, the number of switches, which is possible to be connected to the analog input terminal 7 on condition that the on-off state of each switch can be recognized, depends on the resolution of the A/D converter 8. For example, in cases where the digital value output from the A/D converter 8 is indicated by 8-bit data, each of 256 (equal to 28) switches, through which 256 analog signals are input to the conventional one-chip microcomputer 1, can be theoretically recognized.
However, in the conventional one-chip microcomputer 1 with the A/D converter 8, because the A/D converter 8 is periodically set to the operation state in response to the A/D conversion request signals ADSTART regardless of the reception of the analog input signal, the reception of the analog input signal or the switch relating to the analog input signal is not recognized until the digital value obtained from the analog input signal is sent to the CPU. Therefore, the A/D converter 8 is required to always monitor an analog signal sent from the analog input terminal 7 by periodically receiving the A/D conversion request signal ADSTART from the CPU, and it is required to always or intermittently set the A/D converter 8 to the operation state. Therefore, a problem has arisen that an electric power is consumed to always or intermittently set the A/D converter 8 to the operation state.
Also, to always or intermittently set the A/D converter 8 to the operation state, it is required to always operate the CPU from which the A/D conversion request signal ADSTART is periodically sent to the A/D converter 8 according to a clock signal output from a clock. Therefore, another problem has arisen that an electric power is consumed to always operate the CPU and the clock. Also, in cases where a plurality of analog input terminals 7 are arranged in the conventional one-chip microcomputer 1 with the A/D converter 8, a plurality of analog input signals received one after another at the analog input terminals 7 are processed in the A/D converter 8. In this case, it is difficult for the conventional one-chip microcomputer 1 to immediately recognize an analog input terminal 7 from which an analog input signal is sent. In detail, it is required to perform the A/D conversion in the A/D converter 8 while cyclically monitoring the analog input signals received at the analog input terminals 7. Therefore, it takes a judgment time Tj at least to recognize that an analog input signal is received at a specified analog input terminal 7.Tj=(the number of analog input terminals 7)×(A/D conversion time+time for recognizing a digital value DV)
Therefore, in cases where a plurality of analog input terminals 7 are arranged in the conventional one-chip microcomputer 1, a problem has arisen that it takes a lot of time to recognize an analog signal received at each analog input terminal.